Manufacturer
AMD
Description
CPLD XC9500XL Family 800 Gates 36 Macro Cells 100MHz 0.35um (CMOS) Technology 3.3V 48-Pin CSBGA
Datasheet
DownloadType
Clock Rate
Contact Plating
Height - Seated (Max)
Lead Free
Length
Lifecycle Status
Max Frequency
Max Operating Temperature
Max Supply Voltage
Memory Type
Min Operating Temperature
Min Supply Voltage
Mount
Number of Gates
Number of I/Os
Number of Inputs
Number of Logic Blocks (LABs)
Number of Logic Elements/Cells
Number of Macrocells
Number of Outputs
Number of Pins
Number of Terminals
Operating Supply Voltage
Packaging
Propagation Delay
Radiation Hardening
RoHS
Speed Grade
Terminal Pitch
Turn-On Delay Time
Width
Description
100 MHz
Lead, Tin
1.8 mm
Contains Lead
7 mm
Production (Last Updated: 7 months ago)
100 MHz
85 °C
3.6 V
FLASH
-40 °C
3 V
Surface Mount
800
36
36
2
2
36
36
48
48
3.3 V
Bulk
10 ns
No
Non-Compliant
10
800 µm
10 ns
7 mm
MOQ : Unavailable
Per Unit Price
Unavailable
Total Price
Unavailable
Ships in 7-10 days from Bengaluru
Type
Clock Rate
Contact Plating
Height - Seated (Max)
Lead Free
Length
Lifecycle Status
Max Frequency
Max Operating Temperature
Max Supply Voltage
Memory Type
Min Operating Temperature
Min Supply Voltage
Mount
Number of Gates
Number of I/Os
Number of Inputs
Number of Logic Blocks (LABs)
Number of Logic Elements/Cells
Number of Macrocells
Number of Outputs
Number of Pins
Number of Terminals
Operating Supply Voltage
Packaging
Propagation Delay
Radiation Hardening
RoHS
Speed Grade
Terminal Pitch
Turn-On Delay Time
Width
Description
100 MHz
Lead, Tin
1.8 mm
Contains Lead
7 mm
Production (Last Updated: 7 months ago)
100 MHz
85 °C
3.6 V
FLASH
-40 °C
3 V
Surface Mount
800
36
36
2
2
36
36
48
48
3.3 V
Bulk
10 ns
No
Non-Compliant
10
800 µm
10 ns
7 mm
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