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Manufacturer
Lattice Semiconductor
Description
CPLD ispMACH 4A Family 5K Gates 128 Macro Cells 66.7MHz/95MHz 3.3V 100-Pin TQFP Tray
Datasheet
DownloadType
Case/Package
Clock Rate
Height - Seated (Max)
Lead Free
Length
Lifecycle Status
Max Frequency
Max Operating Temperature
Max Supply Voltage
Memory Type
Min Operating Temperature
Min Supply Voltage
Mount
Number of Gates
Number of I/Os
Number of Macrocells
Number of Pins
Number of Programmable I/O
Number of Terminals
Operating Supply Voltage
Propagation Delay
Radiation Hardening
REACH SVHC
RoHS
Schedule B
Terminal Pitch
Turn-On Delay Time
Width
Description
TQFP
52.6 MHz
1.6 mm
Lead Free
14 mm
EOL (Last Updated: 7 months ago)
83.3 MHz
85 °C
3.6 V
EEPROM
-40 °C
3 V
Surface Mount
5000
64
128
100
400
100
3.3 V
12 ns
No
Yes
Compliant
8542390000|8542390000|8542390000|8542390000|8542390000
500 µm
12 ns
14 mm
MOQ : Unavailable
Per Unit Price
Unavailable
Total Price
Unavailable
Ships in 7-10 days from Bengaluru
Type
Case/Package
Clock Rate
Height - Seated (Max)
Lead Free
Length
Lifecycle Status
Max Frequency
Max Operating Temperature
Max Supply Voltage
Memory Type
Min Operating Temperature
Min Supply Voltage
Mount
Number of Gates
Number of I/Os
Number of Macrocells
Number of Pins
Number of Programmable I/O
Number of Terminals
Operating Supply Voltage
Propagation Delay
Radiation Hardening
REACH SVHC
RoHS
Schedule B
Terminal Pitch
Turn-On Delay Time
Width
Description
TQFP
52.6 MHz
1.6 mm
Lead Free
14 mm
EOL (Last Updated: 7 months ago)
83.3 MHz
85 °C
3.6 V
EEPROM
-40 °C
3 V
Surface Mount
5000
64
128
100
400
100
3.3 V
12 ns
No
Yes
Compliant
8542390000|8542390000|8542390000|8542390000|8542390000
500 µm
12 ns
14 mm
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