Manufacturer
Intel / Altera
Description
CPLD MAX 3000A Family 600 Gates 32 Macro Cells 227.3MHz 3.3V 44-Pin PLCC Tube
Datasheet
DownloadType
Case/Package
Clock Rate
Frequency
Height - Seated (Max)
Lead Free
Length
Lifecycle Status
Max Frequency
Max Operating Temperature
Max Supply Voltage
Memory Type
Min Operating Temperature
Min Supply Voltage
Mount
Number of Gates
Number of I/Os
Number of Logic Blocks (LABs)
Number of Logic Elements/Cells
Number of Macrocells
Number of Pins
Number of Programmable I/O
Number of Terminals
Operating Supply Voltage
Propagation Delay
REACH SVHC
RoHS
Terminal Pitch
Turn-On Delay Time
Width
Description
PLCC
227.3 MHz
250 MHz
4.572 mm
Contains Lead
16.5862 mm
Obsolete (Last Updated: 7 months ago)
227.3 MHz
70 °C
3.6 V
EEPROM
0 °C
3 V
Surface Mount
600
34
2
2
32
44
34
44
3.3 V
4.5 ns
Yes
Non-Compliant
1.27 mm
4.5 ns
16.5862 mm
MOQ : Unavailable
Per Unit Price
Unavailable
Total Price
Unavailable
Ships in 7-10 days from Bengaluru
Type
Case/Package
Clock Rate
Frequency
Height - Seated (Max)
Lead Free
Length
Lifecycle Status
Max Frequency
Max Operating Temperature
Max Supply Voltage
Memory Type
Min Operating Temperature
Min Supply Voltage
Mount
Number of Gates
Number of I/Os
Number of Logic Blocks (LABs)
Number of Logic Elements/Cells
Number of Macrocells
Number of Pins
Number of Programmable I/O
Number of Terminals
Operating Supply Voltage
Propagation Delay
REACH SVHC
RoHS
Terminal Pitch
Turn-On Delay Time
Width
Description
PLCC
227.3 MHz
250 MHz
4.572 mm
Contains Lead
16.5862 mm
Obsolete (Last Updated: 7 months ago)
227.3 MHz
70 °C
3.6 V
EEPROM
0 °C
3 V
Surface Mount
600
34
2
2
32
44
34
44
3.3 V
4.5 ns
Yes
Non-Compliant
1.27 mm
4.5 ns
16.5862 mm
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